PCIe
Direct Answer
PCIe is the interface standard graphics cards connect through, typically using all 16 lanes of a slot for maximum bandwidth. Each generation has roughly doubled per-lane throughput since 2003, from PCIe 1.0's 250 MB/s per lane to PCIe 6.0's 7.56 GB/s per lane using a new PAM4 signaling scheme.
Source: PCI-SIG
Specs
| PCIe 1.0 (2003) | 0.25 GB/s/lane | 4 GB/s x16 |
| PCIe 2.0 (2007) | 0.5 GB/s/lane | 8 GB/s x16 |
| PCIe 3.0 (2010) | 0.985 GB/s/lane | 15.75 GB/s x16 |
| PCIe 4.0 (2017) | 1.969 GB/s/lane | 31.51 GB/s x16 |
| PCIe 5.0 (2019) | 3.938 GB/s/lane | 63.02 GB/s x16 |
| PCIe 6.0 (2022 spec) | 7.563 GB/s/lane | 121 GB/s x16 |
Doubling Roughly Every Few Years
Graphics cards conventionally use the full x16 lane width of a PCIe slot, the widest common configuration, versus the x1 or x4 widths typical of smaller expansion cards. PCI-SIG has released a new generation roughly every few years since the original PCIe 1.0 in 2003, each one roughly doubling per-lane throughput: 1.0 and 2.0 used 8b/10b encoding, moving to a more efficient 128b/130b encoding from 3.0 through 5.0, which is why the jump from 2.0 to 3.0 (985 MB/s per lane) looks smaller than a clean doubling of 2.0's 500 MB/s.
PCIe 6.0, with its specification finalized in January 2022, made a more fundamental change: replacing NRZ (non-return-to-zero) signaling, which encodes one bit per symbol, with PAM4 (4-level pulse-amplitude modulation), encoding two bits per symbol, alongside added forward error correction. That combination pushes per-lane throughput to 7.563 GB/s and full x16 bandwidth to 121 GB/s -- though as with past generations, hardware actually shipping with 6.0 support arrived years after the specification itself, in this case around 2025.