Graphics Cards
7 items
Graphics expansion slot standards (PCI Express) and dedicated high-bandwidth video memory architectures (GDDR5, GDDR6, GDDR6X, HBM, HBM2, HBM3).
Items
GDDR5
GDDR5 was the dominant graphics memory standard from its 2008 commercial debut through the mid-to-late 2010s, running a 32-bit bus per chip at data rates that grew from around 3.6 Gbit/s at launch to 8 Gbit/s in later products, before GDDR6 began succeeding it.
3 specs
GDDR6
GDDR6, standardized by JEDEC in July 2017 and reaching mass production in early 2018, doubled data rates over GDDR5 to as much as 16-18 Gbit/s per pin -- the current mainstream graphics memory standard for most non-flagship cards.
3 specs
GDDR6X
GDDR6X is not a JEDEC standard -- it's a proprietary memory technology Micron developed specifically in collaboration with Nvidia, first shipping in 2020 with the RTX 3080 and RTX 3090. It uses PAM4 signaling, the same two-bit-per-symbol approach PCIe 6.0 later adopted, to reach 19-21 Gbit/s per pin.
4 specs
HBM
HBM (High Bandwidth Memory), standardized by JEDEC in October 2013, takes a fundamentally different approach from GDDR -- stacking multiple DRAM dies vertically and connecting them via through-silicon vias next to the GPU on a silicon interposer, trading GDDR's narrower, faster-clocked bus for a much wider, slower one. Manufacturing cost has kept it mostly in high-end compute GPUs rather than mainstream cards.
4 specs
HBM2
HBM2, standardized by JEDEC in January 2016, doubled HBM's maximum stack height to 8 dies and its per-pin transfer rate, reaching up to 256 GB/s of bandwidth per stack and 8GB of capacity per package.
4 specs
HBM3
HBM3, announced by JEDEC in January 2022, doubled channel count to 16 within the same 1024-bit bus width and reaches roughly 819 GB/s of bandwidth per stack. It's used predominantly in AI and datacenter accelerators like Nvidia's H100, rather than consumer graphics cards.
4 specs
PCIe
PCIe is the interface standard graphics cards connect through, typically using all 16 lanes of a slot for maximum bandwidth. Each generation has roughly doubled per-lane throughput since 2003, from PCIe 1.0's 250 MB/s per lane to PCIe 6.0's 7.56 GB/s per lane using a new PAM4 signaling scheme.
6 specs